Printed circuit boards, integrated circuit wafers and electronic packages and other electronic components are widely used in almost every aspect of the electronics industry. It is important to be able to test the electrical integrity and performance characteristics of these components during manufacture and/or in the field. The ability to perform testing in a facile manner leads to decreased product development time, improved product quality control, and improved technical (diagnostic) service in the field.
The ability to adequately test various boards, wafers and packages in a fast, economical and reliable manner becomes more challenging with the ever increasing density of devices contained on these electronic components. Additional challenges may also be presented where the size (e.g., device-occupied surface area) of these electrical components is also increasing. In meeting these testing challenges, it is naturally desirable to minimize the capital outlay for new test equipment. It is highly desirable to adapt current testing equipment to the testing of more complex electronic components. The ability to adapt testing equipment can result in the ability to avoid or postpone capital investment in testing equipment while still meeting the testing objectives.
Most electronic testing equipment contains two primary functions, namely (1) an electronics section for performing testing protocols and/or reporting test results and (2) an interface between the testing equipment electronics and the electronic component or device under test (DUT). The electronics section of the test equipment used to perform the DUT testing is often fairly adaptable to the increased electrical testing complexity.
While the testing power of electronics section may be adequate or easily adaptable, the ability to efficiently interface the testing electronics with the actual DUT to be tested may present a challenge. The interface in most testing equipment involves the use of a test head. The test head typically engages the DUT. Contacts (pins) in the test head are brought into electrical contact with locations on the DUT. Thus, the test head typically contains a plurality of contacts as well as means for engaging the DUT and establishing physical contact (of sufficient electrical conductivity) between locations on the DUT and the test head contacts. The established electrical connections in turn can be used by the electronics section of the testing equipment to perform the desired testing.
The ability of the electronics section to perform testing efficiently may be held back by the number of contacts that the test head can simultaneously establish with the DUT. Thus, the ability to increase the number of contacts is often desirable from the point of improved testing efficiency. The desire to increase the number of simultaneous contacts generally increases with the complexity of the DUT to be tested. While more contact points are desired, the physical space occupied by the test head and DUT is often fixed by the physical configuration of the overall testing equipment.
In addition to the demand for more contacts, there may be a demand to test a larger DUT. Where the combined space occupied by the test head and DUT is fixed by the physical configuration of the testing equipment, the ability to accommodate a larger DUT may be limited by the space occupied by the test head.
Thus, there is a demand for test head designs which improve the usage of physical space occupied by the test head whereby more contacts can be simultaneously made in the same test head space and/or larger DUT can be accommodated. These demands are especially apparent in the context of existing auto handler and manual DUT board testing equipment as well as in the area of wafer-level testing and burn-in using wafer prober apparatus which typically involves the interfacing of probe cards and wafers (or other device under test) with various contact structures.